Ultra low power wide range four quadrant analog multiplier


KELEŞ S., Keles F.

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, cilt.102, sa.3, ss.491-500, 2020 (SCI İndekslerine Giren Dergi) identifier identifier

  • Cilt numarası: 102 Konu: 3
  • Basım Tarihi: 2020
  • Doi Numarası: 10.1007/s10470-019-01491-1
  • Dergi Adı: ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
  • Sayfa Sayıları: ss.491-500

Özet

A novel four quadrant FGMOS analog multiplier having properties such as low voltage-low power and wide input linearity range is presented. Power consumption of the proposed multiplier is 26.2 nW and the input swing is rail-to-rail which is obtained by choosing the ratio of input capacitances to total capacitance of FGMOS transistors resulting a reduction in the transconductance. Other important features of the proposed multiplier are the bandwidth of 52.5 MHz and maximum THD of 2.04% (when the input voltages are at supply voltage level).